1. Field of the Invention
The present invention relates to magnetic memory devices, and particularly to magnetic memory devices which perform data reading based on a comparison of the results obtained from the access to a regular magnetic memory cell and a reference cell.
2. Description of the Background Art
Magnetic random access memory devices (MRAM devices) include an element having tunneling magnetoresistive (TMR) effect (hereinafter referred to as a “tunneling magneto-resistance element”) as a memory cell. The tunneling magneto-resistance element has a magnetic tunnel junction structure and includes a first magnetic thin film with a fixed direction of magnetization, a second magnetic thin film with a direction of magnetization which is rewritable through an external application of magnetic field and a tunneling insulation film interposed between the first and the second magnetic thin films.
The tunneling magneto-resistance element is characterized in that the resistance thereof takes a minimum value Rmin and a maximum value Rmax when directions of magnetic moments of the first and the second magnetic thin films are parallel and anti-parallel (opposite), respectively. Hence, in a magnetic memory cell (hereinafter also referred to as an “MTJ memory cell”) with a tunneling magneto-resistance element, the parallel state of the magnetic moments (low resistance state) and the anti-parallel state (high resistance state) of the magnetic moments in the tunneling magneto-resistance element correspond with logic levels “0” and “1” of stored data.
Data stored in the MTJ memory cell is held in a non-volatile manner until it is rewritten by the application of a data-writing magnetic field which exceeds a threshold level, at which level the inversion of the direction of magnetization of the magnetic thin film can be occurred. Generally, in the MRAM devices, random access is implemented with a digit line as a write select line and a word line as a read select line both provided corresponding to a row of the MTJ memory cell and a bit line as a data line provided corresponding to a column of the MTJ memory cell. Thus, the MTJ memory cell is arranged corresponding to the intersection of the bit line and the word line/digit line.
At the time of data reading, according to a word line selection, a MTJ memory cell is selected and a tunneling magneto-resistance element in the selected MTJ memory cell (hereinafter referred to as a “selected memory cell”) is electrically connected between a corresponding bit line and a source line. In this state, a potential difference is created between the bit line and the source line thereby producing a current which passes through the MTJ memory cell (hereinafter referred to as a “memory cell current”). The memory cell current, in other words, a current passing through the bit line is detected and data stored in the selected memory cell is read out. More specifically, it is necessary to detect whether the memory cell current is a passing current Imin of an MTJ memory cell which stores data corresponding to the resistance Rmax or a passing current Imax of an MTJ memory cell which stores data corresponding to the resistance Rmin.
A technique is disclosed, for example in Japanese Patent Laying-Open No. 2002-222589 (hereinafter, referred to as “cited publication”), for utilizing a reference cell having a tunneling magneto-resistance element, to generate a reference current to be compared with the passing current of a MTJ memory cell.
The reference current must be set to an intermediate value of the two different memory cell currents Imax and Imin mentioned above. Thus, it is advantageous to generate the reference current using the tunneling magneto-resistance element, which is similar to the MTJ memory cell, as the reference current then can easily be set to an appropriate level.
In the configuration as described above, where the data reading is performed according to the comparison between the passing currents of the selected memory cell and the reference cell, a normal data reading cannot be performed when the reference cell becomes defective.
However, a general procedure for the conventional operation test is, first, writing data of a predetermined pattern to a regular MTJ memory cell as a test, and then checking if the data read out after the test writing matches with a value expected based on the predetermined pattern. In such operation test, when the read data does not match with the expected value, it is difficult to identify either of the regular MTJ memory cell or the reference cell is defective. In particular, when data is read in the similar manner as in the normal operation, it is difficult to test whether the reference cell itself which generates the reference current is defective or not.
The above cited publication discloses a configuration where a reference bit line dedicated for a reference cell can be replaced with a spare reference bit line. However, as the test of the reference cell itself is difficult to perform, it is difficult to correctly determine whether the replacement of the reference bit line with the spare is necessary or not.
Thus, when it cannot be determined which of the regular MTJ memory cell and the reference cell has become defective, effective replacement of a defective memory cell and hence an improvement of the yield of the production of the MRAM device is difficult to achieve.